latpg implements Automatic Test Pattern Generation for combinational digital
circuits, built on llogic's netlist/Boolean-formula representation pipeline.

Four test-generation algorithms:
- latpg-podem: PODEM (Goel, 1981), classical backtracking search deciding
  only at primary inputs.
- latpg-dalg: the D-algorithm (Roth, 1966), classical backtracking search
  that can also decide internal signals.
- latpg-sat-single-fault-test-suite: one SAT-generated vector per fault,
  compacted afterward.
- latpg-sat-optimal-test-suite: an exact, provably-minimum SAT-based search,
  with an optional cone-factored encoding (--cones) sharing propagation
  reasoning across faults a common post-dominator covers.

Plus one executor, latpg-run-tests, which re-simulates a test-suite against
a netlist and reports how many of its own faults the suite actually covers --
independent verification of any of the four generators' output.

Fault modeling: single stuck-at faults on netlist wires, including per-branch
faults at fanout points, with standard structural fault collapsing. SAT-based
generation wires every fault into the circuit once as an assumable-gated
override, rather than building a structurally different faulty copy per fault.

examples/ bundles ready-to-use netlists: every ISCAS-85 benchmark circuit,
plus four small hand-picked arithmetic circuits (2-bit adder, subtractor,
multiplier, divider), all generated via llogic's own tooling.

Unit and golden regression tests cover all four algorithms across the
bundled example circuits.

Copyright 2020, 2021, 2023, 2026, Alexander Feldman.