Rebuild the circuit layer on the netlist IR

The netlist is now the one flat representation. circuit/circuit.py was a second one, predating it and doing the same job, with four converters emitting it and nothing consuming it; everything builds a Netlist, and what the duplicate added beyond that -- materializing constants, collapsing arrays, rendering -- became trans/netlist_to_circuit.

Thirteen parametric circuit generators: adders, subtractors, two multipliers, a divider, comparators, muxes, barrel shifters, sorting networks, a multi-operand adder tree. Each composes, so one builds on another's gates rather than repeating them.

Every dialect is parsed by lark; the OBDD one was the last on ply, which had reported syntax errors as a TypeError. Diagnostics read file:line:column: error: ... throughout.

Fifty console scripts, one for every module meant to be run. They pipe: each reads a file or standard input and writes standard output, and closing the far end of a pipe ends a run quietly.

A variable is identified by name, hierarchical prefix and bit selector together. A dozen places used the name alone, merging a[0] with a[1] and one module instance with the next -- which made the equivalence check compare the wrong ports for any circuit wider than a bit. Roles now travel with a formula across a pipe as well as in memory, so a primary input is still recognizable as one at the far end.

Tests for all nineteen translators, checked by what they compute rather than what they print, over whole input spaces. That found three faults, each fixed here.

Retired: ply, networkx, tqdm, h5py and the profiler it was there for. Declared: lark, which seven modules import and nothing required. No leading-underscore names, no unittest suite, and continuation lines that sit under the argument above them.

The README covers the pipeline, every format, and all fifty tools.